1. Field of the Invention
The present invention relates to a digital TV, and more particularly, to a system decoder which performs PID filtering and section filtering by remultiplexing signals from a plurality of input channels.
2. Background of the Related Art
With the expansion of digital TV broadcasting, the demand for multichannels is increasing. In particular, as services become diversified into ground wave, satellite, cable, etc. and the expansion of functions of, for example, a PVR (Personal Video Recorder), the necessity of simultaneously processing more than two channels is rapidly increasing. In order to simultaneously process a plurality of channels, first of all, the performance of an ASIC for processing them has to be improved proportionately. Especially, not merely in terms of processing speed, but in order to process simultaneously input channel data, a great deal of components have to be operable in parallel.
One of the simplest system decoders for simultaneously processing three channels realizes every component for processing each channel in three sets 10, 30 and 50 as shown in FIG. 1. At this point, the internal constitution of each system decoder is all the same.
As one example, the first system decoder 10 largely includes a PDI filter 12, a descrambler 14, a section filter 16, and an audio/video demultiplexer 20. And, a buffer is used as necessary between the components, and data processed in each of the steps is stored in a corresponding buffer and then transmitted to the next step. In FIG. 1, buffers 11 and 15 are provided at the front end of the PID filter and between the descrambler and the section filter.
FIG. 2 shows a packet buffer structure for storing each transport packet of 188 bytes defined in the ISO/IEC 13818-1.
Further, each of the system decoders requires a decoder for extracting information needed for the header of a packet. In FIG. 1, the PID filter 12 and the section filter 16 each have a decoder.
A filter memory 13 is connected to the PID filter 12, and the codes applicable for a transport packet having a specific PID are set for the filter memory 13. That is, when a packet of channel A is input into the PID filter 12 through the buffer 11, the PID filter sequentially reads the value of the filter memory 13 to make comparison if there is an address having the same PID field as the PID of a packet currently in process. If there is a matching address, the packet is processed as defined in the values of the rest of the fields set for the corresponding address.
FIG. 3 shows one example of a PID filter memory providing 32 words per channel. That is, as shown in FIG. 3(a), a 32-word PID filter memory is allocated to three channels A, B and C, respectively, and each word has 32 bits.
FIG. 3(b) shows the configuration of the fields of a given word (n) of the PID filter memory, i.e., the configuration of the fields of each address. Among the fields stored in each address, EN of 1-bit is for determining whether to apply settings of the corresponding address, and PID field of 13-bits represents a PID of a packet which the settings of the corresponding address is to be applied to. TYPE field represents whether data of a packet having the PID set for the corresponding address is a section type or PES type.
If data of the packet is a section type, low-order fields operate by 5-bit SECF_L_BND and 5-bit SECF_U_BND. These fields set a lower boundary and an upper boundary when sequentially searching a section filter. This increases an operating speed of the section filter by limiting the range of the section filter to be searched to parts.
Meanwhile if data of the packet is a PES type, lower fields operate by OPORT and OBUF. If OPORT_EN field is 1, the packet having the PID set for the corresponding address is output to a port set for OPORT field. Further, if OBUF_EN field is 1, the packet having the PID set for the corresponding address is stored in the buffer set for the OBUF field of 5-bits. This buffer is located in the memory connected to the outside of an ASIC.
In the example of FIG. 3, 3 bits and 5 bits are allocated to OPORT and OBUF so as to be able to select 8 output ports and 32 external memory buffers.
Each of the fields of the PID filter memory as described above are set by software and the PID filter processes a packet according to the settings therefore. For example, among the PID filter memory 13 of channel A, if EN field is set to 1, PID field is set to 31 h, OBUF_EN file ◯┐ is set to 1 and OBUF field is set to 4, one of the packets that has a PID of 31 h input into channel A is stored in a fifth buffer (buffer 4) set to an external memory.
Meanwhile, the section filter also operates in a similar way to the PID filter, and an example of a section filter memory is shown in FIG. 4. That is, if a condition is set for a filter memory allocating 32 indexes per channel, in a case a packet in processing includes a section, the section filter determines whether to take data or not by comparing the value set for the filter memory and the contents of the packet in processing. The section filter memory allocating a 64-word memory for each of three channels A, B and C as shown in FIG. 4(a), each word having 32-bits. At this point, two words form one index. FIG. 4(b) shows the configuration of fields of a given index (n) in the section filter memory.
The fields stored in each index are all selected from the fields of a section header defined in a section data structure in the ISO/IEC 13818-1. In the example of FIG. 4(b), six fields including TBL_ID, SSI, PI, VER_NUM, SEC_NUM, and TSI are used, each of them corresponding to table_id, section_syntax_indicator, private_indicator, version_number, section_number, and transport_stream_id. The MASK filed is a 6-bit mask value for setting whether to use each of these six fields or not. The 5-bit OBUF field designates a buffer for storing a section satisfying the condition.
In the example of FIG. 4, as in the OBUF field of the PID filter memory, one of 32 buffers set for the memory connected to the outside of the ASIC.
At this point, the buffers used for data storage in the PID filter and section filter are all set for the memory connected to the outside of the ASIC. For setting the size and position of these buffers, a register is required, and a buffer setting memory 18 of FIG. 1 plays the role of the register.
In the example of FIG. 1, since 32 buffers are allocated per channel, the buffer setting memory 18 also requires 32 regions per channel.
Additionally, the section filter requires a state memory 19 for helping the operations of the section filter and decoder besides the section filter memory.
At this point, since two consecutive packets having the same PID may share one section, the state memory 19 is give for each PID, i.e., for each PID filter. In other words, in a case that a section does not finish at the end of a packet but goes on to the next packet having the same PID, a packet having a different PID may come between the two packets. Hence, in order to normally process the section included in the latter packet, the section filter has to be initiated to a proper state, i.e., a state right after processing the packet having the same PID recently. At this time, the values for this initiation are stored in the state memory 19. Such similar state information is managed not only in the section filter but also in other decoding processes.
FIG. 5 shows an example of a state memory for storing a state during a section processing for three channels. The state memory has a 128-word memory for each of three channels A, B, and C as shown in FIG. 5(a), each word having 32 bits. At this point, for words form one index. FIG. 5(b) shows the configuration of fields of a given index (n) in the state memory.
At this time, SECF_IDX field among the fields stored in each index stores the index of a section filter having to process a section including a packet having a corresponding PID. BYTE_CNT field stores a number of bytes processed of a section header or data. Based on this value, the position in the previous packet where processing is stopped, i.e., the position in the entire section where the header or data to be processed in the current packet occupies can be known. CRC field stores the hitherto-calculated value of a CRC of the section in processing, and header field stores a 8-byte header of the section in processing.
By the way, in case the header of the section is stopped at the end of the packet, since the portion continuing in the next packet has no information, such as a table ID or the like, it is impossible to find a proper section filter. This problem can be solved by using SECF_IDX field and the header information after storing them as shown in FIG. 5. This state information is provided for the case that a section is sent in two packets. Since this case does not occur more than twice for one PID, one unit of state information is allocated per PID filter. FIG. 5 shows an example of 32 PID filters being provided for each channel.
As described above, the structure of FIG. 1 is constructed of three independently operable complete system decoders. Thus, the processing of a plurality of channels utilizing system decoders as shown in FIG. 1 has no great difficulty in realization because it is possible to start the processing from a single channel decoder. But, the system decoders of FIG. 1 has a drawback that they are inefficient in terms of manufacturing cost because each of them has no less than three components unnecessary according to circumstances or redundant.
The system decoder is divided into the parts where each of the components plays a certain role and may have some parts that are not used at all according to application fields. Thus it is not preferable to redundantly realize the entire components.